Advancing Thin Film Metrology in 3D Structures: The Benefits of the PillarHall Concept

This is a blogpost initiated by our sponsor Chipmetrics

The rapid advancement of nanoelectronics is driving the transition to 3D vertical scaling, requiring ultra-thin, highly conformal films to be deposited within high-aspect ratio (HAR) structures. As these technological advances push boundaries, precise thin-film metrology becomes paramount. Chipmetrics is leading the charge with its innovative Lateral High Aspect Ratio (LHAR) test structure and measurement method, offering unique capabilities in characterizing 3D thin films.¹

Limitations of Conventional Vertical HAR Test Structures

Industrially-relevant vertical high aspect ratio test structures, such as channel hole arrays face significant limitations, including restricted aspect ratio typically below 100 AR, generally poor availability and cumbersome cross-sectional sampling.

Chipmetrics’ PillarHall® test chips are engineered to address these challenges head-on. These chips feature lateral trenches with extreme aspect ratios (>1000) and a nominal gap heights of 500 nm and 100 nm. Their horizontal geometry enables straightforward and precise top-view measurements of film thickness profiles as a function of penetration depth (PD). Beyond conformality characterization, film properties can be analyzed along the horizontal trench, as highlighted later in this blog. Furthermore, PillarHall is enabling the study of fundamental growth aspects such as sticking coefficients, recombination probabilities and diffusion. Figure 1 presents a table of these aspects with corresponding literature references.

Figure 1: Overview of vapor-phase deposition techniques and related aspects that have been studied in literature by PillarHall.^1–24 The references can be found at the end of this blogpost.

Translating PillarHall Measurements to Vertical HAR Structures

One key question is whether experimental insights from horizontal PillarHall trenches translate to the vertical structures used in semiconductor applications. Recent studies on 50 nm Al₂O₃ deposition via Atomic Layer Deposition (ALD) using both lateral high aspect ratio (LHAR) and vertical high aspect ratio (VHAR) structures demonstrate excellent agreement between measured and predicted PD values under identical conditions (Figure 2).

PillarHall LHAR experimental penetration depth data were converted into equivalent VHAR penetration depth using Chipmetrics’ High Aspect Ratio (HAR) Calculator. The experimental data from VHAR structures showed remarkable agreement with the PillarHall measurements and the predictions, validating the reliability of the approach. This alignment confirms that PillarHall structures effectively mimic the behaviour of VHAR structures, and PillarHall-derived conformality data can be confidently used to predict conformality in other high aspect ratio geometries, enabling engineers to optimize processes with exceptional accuracy and efficiency.¹

Figure 2: PillarHall LHAR4 comparison to vertical high aspect ratio (VHAR1) test structures. (a) Top-view image of deposition in a PillarHall chip. (b) Corresponding deposition in a VHAR1 structure. (c) Schematic view of the 3D structures on the chips and their dimensions. (d) Experimentally observed and calculated AR values for LHAR4 and VHAR1 structures, for two different TMA dose times.

Figure 3: Thickness profile results from a 50 nm thick Al₂O₃ deposited via ALD. A relative thickness profile can be easily extracted by a gray-scale analysis of the optical microscope image. The validity of this approach is validated by the line-scan reflectometry. The table shows the ALD process parameters.

The predictive capability of PillarHall eliminates costly and time-intensive experimental iterations, significantly improving process control and development. By utilizing extreme high-aspect-ratio test structures like PillarHall®, engineers can develop a process window with sufficient safety margins that align with actual product properties. This approach not only ensures high reliability in process development but also enhances production process control. By detecting potential process drifts within the process window well in advance, manufacturers can implement corrective measures proactively, minimizing downtime and ensuring consistent product quality.

The Chipmetrics HAR Calculator, based on the physical modelling established by Gordon et al. ,²⁵ enhances the practical application of the PillarHall method. By using conformality measurement data from PillarHall measurements, the corresponding film penetration depth in other target structures can be predicted. The aspect ratio $\alpha$ differs slightly depending on geometry:

In PillarHall trenches: $\alpha={L}/{2w}$ , where $L$ is the film penetration depth and $w$ is the trench gap height.
In hole-type HAR structures (e.g., 3D NAND channel holes): $\alpha={L}/{d}$ , where $d$ is the hole diameter.

By using this model, and taking also into account the growing film thickness influence on the effective aspect ratio, the film penetration depth for any target HAR structure—whether defined by a hole diameter for circular or square holes—can be accurately predicted using Chipmetrics’ HAR calculator.

Figure 4: Chipmetrics’ high aspect ratio comparison tool.

Scalability of PillarHall for Fab-Level Applications

The adaptability of PillarHall LHAR chips extends beyond R&D with coupon size experiments and isolated tests. When distributed across a wafer carrier, the PillarHall® chips enable wafer-level conformality assessments, supporting tool qualification and reactor comparisons. This scalability positions PillarHall method as a cornerstone for the semiconductor fab environment level applications, where tool qualification is the most obvious market entry.

The ALD metrology applications in DRAM, 3D NAND, and CFET, where conformal films are typically ultra-thin, require the PillarHall solution to include highly sensitive thickness measurement with sub-angstrom resolution and high spatial resolution, preferably with a spot size of <10 microns. In this respect, a promising instrument is the imaging ellipsometer. An example study of this is shown in Figure 5, allowing for high-resolution determination of the thickness profile in the trench. Conventional ellipsometers can also be relatively easily adapted for PillarHall, for example, by using focusing optics.

Figure 5: Conformality studies for ultrathin films (˂10 nm) using scanning ellipsometry.

Comprehensive In-Trench Thin-Film Characterization with PillarHall

Compared to direct measurements in device wafer hole arrays, PillarHall’s horizontal geometry allows easy top-down characterization after membrane removal. As shown in Figure 6, techniques such as X-ray photoelectron spectroscopy (XPS), Raman spectroscopy, and spectroscopic ellipsometry can be combined for comprehensive film property analysis along the trench. These methods provide insights into elemental composition, chemical bonding, microstructure, and potential contamination sources, crucial for doped films and ternary oxides.²³

Figure 6: Showcase of complementary analysis techniques for studying the properties of plasma-enhanced spatial ALD TiO₂ films as a function of depth. Combined, these techniques uniquely revealed a complex growth mechanism, involving aspects such as i) a progressing crystalline front with enhanced growth rate, (ii) plasma-UV enhanced growth at the trench opening and (iii) a second deposition front beyond the radical-recombination limited aspect ratio. Further details can be found in the paper of van de Poll *et al*.²³

Conclusion

In conclusion, the PillarHall® concept provides a powerful and reliable metrology solution for characterizing thin films in high-aspect-ratio structures. By demonstrating excellent agreement with vertical HAR structures, PillarHall enables engineers to optimize deposition processes with confidence, reducing experimental iterations and enhancing process control. Its adaptability from R&D to fab-level applications, combined with advanced measurement techniques, makes it an invaluable tool for advancing nanoelectronics manufacturing.

References

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