AtomicLimits ImageBase
Welcome to the AtomicLimits ImageBase! With this library we hope to facilitate the re-use of images for e.g. presentations. You can conveniently use the tags to filter images by category.
About image rights
The user is solely responsible for proper conduct with respect to image use and referencing and, if applicable, should rely on the information provided by the original source. If you do use one of the images, please make a proper reference to the original author/source. Most images are accompanied with a short exemplary credit line. Also take notice of the Creative Commons licenses, if mentioned. The various license types can be found here. Note that “adapted from” implies the presented image is inspired by or a variant of the referenced image.
Fully Self-Aligned Vias
(a) Edge placement error (EPE) in interconnect fabrication. Due to the reduced spacing to the neighboring line, shorts can occur. (b) FSAV scheme based on recess etching. (c) FSAV scheme based on area-selective ALD. A.J.M. Mackus, M.J.M. Merkx. Fully Self-Aligned Vias: The Killer Application for Area-Selective ALD? – A Discussion of the Requirements for Implementation in High Volume Manufacturing. 2019, 7. AtomicLimits.